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Ney Laert Vilar Calazans Homepage

Professor at PUCRS - School of Technology
Member of: IEEE (Senior) - SBC - SBMicro
CNPq Research Productivity Scholarship - Level 1C

PUCRS - School of Technology
6681, Ipiranga Av. - Building 32 - Suite 718
Porto Alegre - Brasil - ZIP: 90619-900
Work phone: +55 51 3353 8718
E-mail: ney dot calazans at pucrs dot br

Comp Eng Introd	Proc Org/Arq	Dig Syst Constr

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NEWS

Mai/2019: Article published in ASYNC´19 conference in Japan. Chosen as one of 3 Best Paper Finalists.
Dec/2017: Article published in the IEEE Transactions on Circuits and Systems I journal.
Apr/2013: Ney Calazans elevated to the Senior Member category at IEEE.

Work with us! Take an MSc or PhD course at the PPGCC. International Excellence in Computer Science. CAPES grade 6 of 7.
PPGCC-PUCRS

My Research Interests

Microelectronics
Asynchronous Circuits
Standard Cells and Libraries
Networks on Chip (NoCs)
Design and Verification of VLSI Systems (ASICs)
Rapid prototyping of Digital Systems using FPGAs
Design Tools for VLSI Systems (EDA or E-CAD)
Applications in Telecommunications

My Academic Background

Post-Doctoral Senior Stage (USC - 2014/2015)
PhD in Applied Sciences (UCL - 1993)
MSc in Computer Science (PPGC-UFRGS - 1988)
BS in Electrical Engineering (EE-UFRGS - 1985)

Professional Information

The Hermes NOC and the ATLAS Environment

Asynchronous Circuits Stuff

The HeMPS MPSoC

Awards

PhD Competition Award - ICECS 2012

Best Full Paper Finalist - ASYNC 2019

AWARD

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My Research Keywords

The PhD-Reconf Hw Era (1993-2000)

The Reconf Hw-NoCs Era (2000-2007)

The NoCs-Async Era (2007-2018)

Overall (1993-2018)

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Last Updated: October, 7^th 2019