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Bookmarks bar Ney Laert Vilar Calazans Remove crapware from your Windows 7 & Vista Computer ARM Library Access for Universities Histórico www.inf.pucrs.br/~calazans/publications/2010_TCC_MatheusTrevisanMoreira.pdf Sites
My Research Interests FPGAs and Programmable Logic Xilinx Xilinx Home Page Xilinx University Programs Xilinx Application Notes Partial Recongfigurability Frequently Asked Questions Xilinx Modular Design Download and Documentation Page Xilinx Modular Design Tool Page Home - support.xilinx.com Xilinx Software Update Page Xilinx University Resource Center at Michigan State University - Home Xilinx XUP Software Solutions News Xilinx University Products, Pricing and Donation Forms About the Xilinx Student Edition Package Xilinx File Download: ftpfiles XILINX IP CENTER Xilinx Home : Products : System Solutions : Processor Central : MicroBlaze Application Notes Download Center Altera Altera Home Page Excalibur Embedded Processor Solutions Altera Development Platforms Partner Development Kits MAX+PLUS II Software Support Download Center Atmel FPGAs How many gates? FPGA Column - October 1997 ( ESNUG 356 Item 5 ) [8/03/00] comp.arch.fpga archives - messages from 20950 comp.arch.fpga archives - messages from 8800 DeepChip Homepage MicroBlaze PowerPC e EDK Xilinx Home : Products : Design Resources : Embedded Tools Design Center: Embedded Development Kit Xilinx Home : Products : Design Resources : Embedded Tools Design Center: Download Xilinx Home : Products : Design Resources : Embedded Tools Design Center: Supported IP Xilinx Home : Products : Design Resources : Embedded Tools Design Center: EDK : Example Designs Xilinx Home : Products and Solutions : System Resources : Processor Central : CoreConnect Cygwin User's Guide MicroBlaze Soft Processor Core - Lectures about MicroBlaze Support Sw/Hw Enterprises XESS Elastic Computing Aldec's Information Server Avnet, Inc. FPGA Boards and Platforms Digilent, Inc. MicroBlaze MicroBlaze Soft Processor - Literature Xilinx Boards - Virtex-Pro AFX Boards Avnet Electronics Marketing - Evaluation Kits Board Module EVALXC2S/XCV/XCVE-HQ240 SPYDER VIRTEX-X2E / XCV2000 ErSt Electronic Product Prices Xess Boards VHDL Projects at Queensland EDA.ORG Home Page Chip_Implementation VTVT Standard Cell Library Distribution The NC State University Cadence Design Kit (CDK) Mentor Higher Education Program ASIC Design Kit MOSIS Research Account (Re)Configurable Computing Reconfigurablity with Virtex FPGAs Xilinx Online Partial Reconfiguration FAQ Annapolis Micro Systems, Inc. Home Page The Virtual Workbench -- Virtex Nallatech Products - Ballynuey Overview Partial Reconfiguration for the Crossbar Switch AltaVista: Simple Query reconfigurable+computing Dynamically Reconfigurable Hardware at Bournemouth Univ - M. Vasilko Virginia Tech Configurable Computing Research Reconfigurable Computing History Old Oxford Hardware Compilation Group Old Hardware Compilation Home Page Splash 2: FPGAs in a Custom Computing Machine - Table of Contents BYU Reconfigurable Logic Lab Home Page BYU Reconfigurable Logic Bibliography BYU RLL: James Hadley & Brad Hutchings Links | PipeRench Reconfigurable Computing Project | CMU Reconfigurable Computing at Washington State FAQ contents detailed - Xputer Lab Kaiserslautern - Reconfigurable Computing with KressArray FTP Directory: ftp://ftp.xilinx.com/pub/utilities/6200/ OneChip SCORE - BRASS Group Score Project Page - BRASS Research Group - Berkeley BRASS Documents Berkeley Reconfigurable Architectures, Systems, and Software: SCORE Tutorial Xputer Xputer Lab Kaiserslautern - Reconfigurable Computing with KressArray Xputer Publications - Papers about Reconfigurable Computing Xputer Publications - Reconfigurable Computing with KressArray André DeHon Andre DeHon at Caltech Papers by Andre' DeHon Andre DeHon at MIT Oliver Diessel System Level Modeling and Synthesis UCI Center for Embedded Computer Systems (CECS) - Irvine - Gajski RASSP HOME PAGE TIMA-SLS SOC Institute for System Level Integration (ISLI): Postgraduate education (MSc, EngD, PhD), training and research in electronic engineering and computer science Cadence TestBuilder IP Cores BrazilIP Gaisler Research - Leon Processor Site www.brazil-ip.org http://lad.dsc.ufcg.edu.br/ip/ Gaisler Research - Leon Processor Site Busses CoreConnect 64-bit Implementation Technical Library Specifications - On-Chip Peripheral Bus Specifications - Processor Local Bus (64-bit) IBM CoreConnect Technology OCP 1.0 Specification Summary of SoC Interconnection Buses Philips Semiconductors - I2C - I2C-bus Free IPs, Free Cores fpgacpu.org - FPGA CPU News Microprocessor Soft Cores from VAutomation Inc. The Free IP Project CMOSexod.com your source of free Verilog/VHDL IPs. Xilinx Design Reuse OPENCORES.ORG OPENCORES Projects Embedded Processors Embedded Processors Tutprial, Part One fpgacpu.org - Gray Research LLC Leon - Gaisler Research Discussions about Leon Endianess Innocor-Supplier Of Test Equipment And Technology Cores For The Telecom Industry - Innocor UTOPIA/POS-PHY Master Canadian Microelectronics Corporation / Société canadienne de micro-électronique NOCs IMEC Reconfigurable Publications Home Page of Loren Schwiebert - Adaptive routing papers Terry Tao Ye's Home Page Axel Jantsch's Homepage On-Chip Network Resources - Network on-chip (NoC) SUNMAP: a Tool for Automatic TopologySelection and Generation for NoCs - Pesquisa Google Redes & Telecom IEC: Online Education ATM Welcome to the ATM Forum ATM Forum Approved Specifications Utopia 2/3, ATM, Ethernet core, high-speed networking, network testbench ATM Cores Datasheet Hydragyrum University of California, Irvine Networking Research - Tatsuya Suda Mika Loukola ATM People Links STC Internal Report STC Internal Report 1996 Research Issues Unicamp - FEE - Grupo de Redes - Projeto MC21 ICA: Jean-Yves Le Boudec/Stephan Robert - Markovian Self_similar Traffic NLANR MOAT: Auckland-VII trace archive ATM Chip Database ATM ChipWeb Ethernet Ethernet - Lots of info from Hawaiin University Charles Spurgeon's Ethernet (IEEE 802.3) Web Site Gigabit Ethernet Training Page Crynwr Software para Ethernet e outros Simuladores Ethernet e outros - AllSim Network Simulators Index of drivers for Ethernet adapters LXT970A Fast Ethernet Transceiver Ethernet MAC 10/100 Mbps The Ethereal Network Analyzer Internet Internet RFC/FYI/STD/BCP Archives Internet FAQ Consortium Obsolete RFC Index SYNAPSE: BANalyzer - Online Network Protocol Database SDL Forum SDL Integrated Tool Environment in Berlin JADE - UFMG ITU-T Recommendations - All of it ITU-T Z-series - Languages and general software aspects for telecommunication systems Telelogic: Solutions - Using SDL, UML, etc IEEE Communications Letters IEEE Communications Society -- Digital Library Cinderella Software Efficient Networks Learning Center - Learn About DSL and Broadband Glossary Of Terms - My WAN ICA Network Simulators ANTD Products / Impact NSF Network Research Testbeds Workshop Protocols for WAN, LAN, ATM data communications and telecommunications RADCOM - Network Testing and Quality Management Escola de Engenharia Mackenzie IEC: Online Education Roadmaps VSI Alliance Semiconductor Industry Association homepage ITRS Semiconductor Roadmap Home Page Software and Hardware Languages and Tools SystemC SystemC: Welcome Doulos SystemC HeadStart Kit - My registered page Balboa Project - Rajesh Gupta LSC - Computer Systems Laboratory - Unicamp - Guido Lab SCBench Project page DLX Simulator in System C Forte Design Systems -- Behavioral Design and Synthesis Homepage of Prof. Stephen A. Edwards Synopsys- SolvNet - ViewConnect Superlog Superlog® from Co-Design Automation VHDL Links to VHDL sites Cadence TestBuilder - Testbench Generator for VHDL, Verilog, SystemC Index of /LEDA/download/unix VHDL versus Verilog Java(TM) 2 SDK, Standard Edition 1.2 Tutorial SBLP99 - Desenvolvimento em Java GCC Releases GCC: About GCC Home Page Java(TM) Technology Products & APIs SDL SDL Integrated Tool Environment JADE Accellera Petri Nets Petri Nets World: Petri Nets Tools Database Quick Overview free petri net simulation software tool HPSim for download VLSI Molecular Expressions: Electricity and Magnetism - Interactive Java Tutorials Microelectronic Systems News EDA.ORG Home Page Codesign Polis Homepage Hw/Sw Codesign Group POLIS (version 0.4, November 1999) POLIS - Directory of /pub/HWSW/sol2 Esterel v5_92 Compiler Distributions Esterel History Ptolemy Codesign at LIRMM Abstract Syntax Description Language Frontier Design Electronic Design Automation Software The SpecC System SDL 1 Introduction to SDL, MSC, TTCN and ASN.1 JADE - an SDL Editor Telelogic: Solutions - Using SDL, UML, etc ITU-T Z-series - Languages and general software aspects for telecommunication systems Hw/Sw Co-Design, CAD, HLS, Embedded Systems Web Pages Karsten Strehl - Publications Doulos SystemC HeadStart Kit SystemPerl Pareto points and Multi-Objective Optimization 1 Pareto points and Multi-Objective Optimization 2 UERJ - Depto. de Sistemas <BR> Professores Dynamically Reconfigurable Hardware Research at Bournemouth University Old Stuff Algoritmos de Sort NOW-Sort Full Sorting Bibliography Parallel Processing Publications (John Carter - University of Utah) CPAD - Centro de Pesquisa em Alto Desempenho Universal, 64/32-bit, 66/33MHz, Myrinet-Serial/PCI interface Distributed Shared Memory - Erlangen Univ Distributed Shared Memory - Alberta Univ Jason Crawford's Research NCP2's Home Page Beowulf Project at CESDIS Multithreaded Implementations and Comparisons - A WhitePaper Kang's Multithreading Information Page Contents Sundance Multiprocessor Technology Ltd. Transputers transputer transputer assembly language Transputers Architecture Lab Internet Parallel Computing Archive IPCA - parallel:kroc IPCA - parallel:occam:documentation IPCA - parallel:occam:projects:occam-for-all Dave Beckett: Research and Work occam For All Project: KROC target processors CAPSL Homepage B E O W O R L D IEEE Task Force on Cluster Computing Clusters @ TOP500 - Top Clusters Low Level IC Design Microwind2 Dsch2 Synthesis High Level Stanford Olympus Synthesis System Logic Synthesis NCSU Collaborative Benchmarking Laboratory PHOAKS: Resources for comp.cad.synthesis Magic - A VLSI Layout System Ftp of Colorado University MCNC Home Page Robert K. Brayton A One-Semester Graduate Course in Logic Synthesis UC Berkeley Design Technology Warehouse Hardware/Software Codesign Group http://HTTP.CS.Berkeley.EDU/~randy/Courses/CS252.S96/CS252.Intro.html CLD Table of Contents Decomposition JASON CONG'S PUBLICATIONS Christoph Scholl VHDL-Online Main Frame EECS Industrial Relations Office, UC Berkeley UCB software - Table of Contents Software Catalog, Ordering Forms and Instructions Stanford Digital Systems CAD Group UC Berkeley CAD Seminar EPIC Design Technology Inc. Asynchronous Circuits Asynchronous Bibliography Asynchronous Logic Groups Worldwide Erik Brunvand CWI - Mathematics and Computer Science Category Theory for Computing Science FTP Directory: ftp://ftp.eecg.toronto.edu/pub/software/martin/ Miscellaneous Pages Catacomb Asynchronous Mailing List Index Asynchronous Bibliography Bibliography on asynchronous circuits Newcastle: Asynchronous Pubs Jo C. Ebergen Amulet An Introduction to Asynchronous Design Asynchronous Tools S.B. Furber publications Papers do Garside - UK AMULET Papers Self-Timed FPGA Systems Asynchronous Logic Home Page ACiD-WG Home Page Publications on Asynchronous Circuit Design Publications of Teresa Meng FTP Directory: ftp://ftp.ee.umanitoba.ca/pub/asynchronous/ Caltech Asynchronous VLSI Group Pubs Caltech Asynchronous VLSI Group Page Async98 Symposium Chris J. Myers Triptych/Montage FPGA Architectures Asynchronous Circuits Asynchronous Circuit Design DESIGN TECHNOLOGY WAREHOUSE IEEE D&T: Tables of Contents, Past Issues Formal Verification The VIS Home Page The Ext System ProCoS archive The World Wide Web Virtual Library: Formal Methods To Classify Later RP-Project DESIGN TECHNOLOGY WAREHOUSE PRL Publications Programmable Logic Research Groups ( FPGA , CPLD ) Selected papers by Wayne Luk TTU ECE Computer Engineering HICSS 32: Table of Contents ETH Zurich / Computer Science / Prof. N. Wirth Virtual Computer Corporation-- Home Page Oxford University MicroProcessor Unit:Programmable Logic links Reinventing Computing Home Page Transit Project Home Page RC Roundtable Mathematics History of Mathematics Topology history What is Topology? Definition and examples of topologies SQUARE ROOT THEORY
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Conferences - CFPs, Proceedings and related stuff Call for Papers - Largest listing of call for papers in all areas of specialization FPGAs and related subjects FPL homepage SIGDA Proceeding Archives SIGDA Home Page IEEE Communications Society -- Conferences DeepChip ESNUG Archive Escola de Computação 2000 - Escolas passadas
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PUCRS Convenio Microsoft - FACIN (MSDNAA) Undergraduate Courses Circuitos Digitais Karnaugh Map 1.2 Karnaugh Map interactive Karnaugh map RIAED - Simulateur de circuit logique Alan Mishchenko's Homepage - SOP Minimization Logic Design Boolean Functions Simplification (Logic Minimization) Arquitetura de Computadores I Microprocessor Pictures and Data CPU Info Center -- Die Photo List Intel Museum Home Page Molecular Expressions Photo Gallery: The Chip Shots Collection General Processor Information x-bit labs - Special Hardware Infocenter x-bit labs - Special Hardware Infocenter Computer Organization and Design, Second Edition Welcome To SPEC EEMBC - Embedded Microprocessor Benchmarking Consortium TOP500 Supercomputing Sites Processor Information : Intel MIPS: Publications Geraldo Campos home page (Curso Arq Comp) CS152 Lectures Clusters @ TOP500 - Top Clusters Avocet Systems Software Download Page www.6502.org: Emulators 6502 & Utilities 65C02 Emulator For Windows Site do Abacus 8085 - UFSC Organização de Computadores History of Computing Green Mountain VHDL Tutorial Tópicos I Adam's PIC micro-Resources Sistema de Alocação de Recursos Computacionais - FACIN Sistema de Publicação e Entrega de Atas - Graduação FACIN/PUCRS - FORMULÁRIOS FACIN, Depto Fundamentos FACIN: Planos e programas das disciplinas Sistema SIBIC - Acesso a Projetos IC
Education Computer Organization and Architecture Embedded Processors Tutprial, Part One SPEC CPU2000 Processor Homepages Leon Gaisler Research 8051 Project OpenUP: An 8-bit CISC fpga-processor designed on VHDL 8052.COM - The Online 8052 Resource Intel 8051 Model MIPS Philips Semiconductors - PIP - MIPS PR31100; Highly integrated embedded processor Informations about Processor Endianess Intel Museum - Microprocessor Hall of Fame Digital Systems MMT Group: Research Projects Applets at TECH Computer Engineering CBU Engineering ECE Course Requirements EE vs CE Curriculum UC Davis Catalog 97-8/Electrical & Computer Engr Prog Computer Science and Engineering(CSE) Pitt Computer Engineering Description Workshop on Computer Architecture Education Are we computer scientists or software engineers?
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